1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and a structure of a semiconductor device, and more particularly, it relates to a method of forming a gate electrode of a MISFET (metal insulator semiconductor field-effect transistor) and a structure thereof.
2. Description of the Background Art
The gate length of a MISFET is reduced following refinement of a semiconductor device, while sheet resistance as well as contact resistance of a gate electrode are increased. When such resistance is increased, the operating speed of a circuit is slowed down and the following problem is caused: In a DRAM (dynamic random access memory), for example, the length of word lines must be reduced in order to compensate for increase of wiring resistance resulting from reduction of a wiring sectional area, and hence the number of memory cells connectable to each word line is reduced. Therefore, the number of necessary sectional word lines as well as the number of peripheral circuits such as sense amplifiers are increased, leading to the increase of the chip area. Consequently, the number of chips per wafer is reduced, resulting in increase of the manufacturing cost.
Therefore, a conventional MISFET uses a gate electrode (the so-called polycide gate) having a two-layer structure of a doped polysilicon layer and a metal silicide layer exhibiting smaller gate resistance than a gate electrode (the so-called polysilicon gate) consisting of only doped polysilicon. For example, a gate electrode having a two-layer structure of a doped polysilicon layer and a cobalt silicide (CoSi2) layer or a two-layer structure of a doped polysilicon layer and a tungsten silicide (WSix(2.2xe2x89xa6xxe2x89xa62.7)) layer is used.
In a refined MISFET having a gate length of not more than 0.12 xcexcm, however, it is impossible to sufficiently speed up circuit operations by refining the semiconductor device due to large gate resistance also when its gate electrode is formed by a polycide gate. To this end, a gate electrode (the so-called polymetal gate) having a three-layer structure of a polysilicon layer, a barrier layer and a metal layer having smaller gate resistance than the polycide gate has been proposed.
FIG. 29 is a sectional view showing the structure of a conventional semiconductor device comprising a polymetal gate. A multilayer structure obtained by stacking a doped polysilicon layer 102, a barrier layer 103, a metal layer 104, another barrier layer 105 and an insulating layer 106 in this order is formed on the upper surface of a silicon substrate 100 through a gate insulator film 101. FIG. 29 omits illustration of element isolation films and source/drain regions.
An impurity is introduced into the doped polysilicon layer 102 in a high concentration (about 1xc3x971020 to 8xc3x971020/cm3). More specifically, an n-type impurity such as phosphorus or arsenic is introduced in a surface channel N-type MOSFET or a buried channel P-type MOSFET, while a p-type impurity such as boron is introduced in a surface channel P-type MOSFET or a buried channel N-type MOSFET.
The metal layer 104 is prepared from tungsten or the like, and the barrier layer 103 is prepared from a barrier metal consisting of a metal nitride such as tungsten nitride (WN) or titanium nitride (TiN). When silicon atoms contained in the doped polysilicon layer 102 and metal atoms contained in the metal layer 104 mutually diffuse/react due to heat treatment to form metal silicide in the vicinity of the interface between these layers 102 and 104, the metal silicide is formed in part of the metal layer 104 since the metal silicide has higher resistance than the metal to increase the resistance of the polymetal gate as a whole. The barrier layer 103 is provided in order to suppress occurrence of such a phenomenon.
However, the conventional semiconductor device comprising the polymetal gate shown in FIG. 29 has the following problems: As hereinabove described, the doped polysilicon layer 102 is doped with the impurity in a high concentration. When heat treatment is performed during steps of manufacturing the semiconductor device, however, the impurity introduced into the doped polysilicon layer 102 in the vicinity of the interface between the same and the barrier layer 103 thermally diffuses into the barrier layer 103. Further, the impurity introduced into the doped polysilicon layer 102 in the vicinity of the interface between the same and the gate insulator film 101 thermally diffuses into the gate insulator film 101. Consequently, the impurity concentration of the doped polysilicon layer 102 is reduced in the vicinity of each of the aforementioned interfaces to cause partial depletion of the layer doped with the impurity, and hence resistance is increased in this portion. Consequently, the resistance of the polymetal gate is also increased as a whole.
When the metal atoms contained in the barrier layer 103 diffuse into the doped polysilicon layer 102 due to heat treatment or the silicon atoms contained in the doped polysilicon layer 102 diffuse into the barrier layer 103 due to heat treatment, the silicon atoms and the metal atoms react with each other to form metal silicide. While there is no problem if the metal silicide is homogeneously formed around the interface between the doped polysilicon layer 102 and the barrier layer 103, such metal silicide is partially formed in practice. Therefore, the contact resistance on the aforementioned interface is locally increased to disadvantageously increase the resistance of the overall polymetal gate. This problem can also be caused when the metal atoms contained in the metal layer 104 and the silicon atoms contained in the doped polysilicon layer 102 pass through the barrier layer 103 to diffuse to each other.
According to a first aspect of the present invention, a method of manufacturing a semiconductor device comprises steps of (a) forming a gate insulator film on a main surface of a semiconductor substrate, (b) forming a first semiconductor film on the gate insulator film which is doped with a prescribed impurity and having at least partially a layer consisting of a material having a higher impurity activation rate than polysilicon, (c) forming a barrier film on the first semiconductor film, (d) forming a metal film on the barrier film and (e) selectively removing the metal film, the barrier film and the first semiconductor film in this order thereby forming a gate electrode.
According to the first aspect, resistance of the gate electrode can be reduced as compared with the case of forming the gate electrode by a first semiconductor film consisting of only polysilicon.
According to a second aspect of the present invention, the first semiconductor film entirely consisting of the layer is formed in the step (b).
According to the second aspect, resistance of the gate electrode can be reduced as compared with the case of forming the gate electrode by a first semiconductor film partially having a layer consisting of a material having a higher impurity activation rate than polysilicon.
According to a third aspect of the present invention, the step (b) includes steps of (b-1) forming a second semiconductor film consisting of the material as the layer and (b-2) forming a third semiconductor film different in impurity activation rate from the second semiconductor film.
According to the third aspect, the threshold voltage of a transistor can be adjusted by adjusting the ratio of the thickness of the second semiconductor film to that of the third semiconductor film.
According to a fourth aspect of the present invention, the second semiconductor film is formed in at least either a part including the interface between the same and the barrier film or a part including the interface between the same and the gate insulator film.
According to the fourth aspect, partial depletion of the layer doped with the impurity can be avoided in the second semiconductor film around the interface between the same and the barrier film by forming the second semiconductor film on the part including the interface. Further, partial depletion of the layer doped with the impurity can be avoided in the second semiconductor film in the vicinity of the interface between the same and the gate insulator film by forming the second semiconductor film on the part including the interface.
According to a fifth aspect of the present invention, the method of manufacturing a semiconductor device further comprises a step (f) of introducing noble gas atoms into the first semiconductor film in the vicinity of the interface between the same and the barrier film.
According to the fifth aspect, formation of a metal-semiconductor alloy can be suppressed in the first semiconductor film also when metal atoms contained in the barrier film or the metal film diffuse into the first semiconductor film.
According to a sixth aspect of the present invention, the method of manufacturing a semiconductor device further comprises a step (g) of introducing noble gas atoms into the metal film in the vicinity of the interface between the same and the barrier film.
According to the sixth aspect, formation of a metal-semiconductor alloy can be suppressed in the metal film also when semiconductor atoms contained in the first semiconductor film diffuse into the metal film.
According to a seventh aspect of the present invention, the method of manufacturing a semiconductor device further comprises a step (g) carried out in advance of the step (d) for introducing noble gas atoms into the barrier film.
According to the seventh aspect, formation of a metal-semiconductor alloy can be suppressed in the barrier film also when the semiconductor atoms contained in the first semiconductor film diffuse into the barrier film.
According to an eighth aspect of the present invention, the noble gas atoms are introduced into the barrier film by ion implantation in the step (h).
According to the eighth aspect, the barrier film approaches an amorphous state, whereby a metal film having a large crystal grain size can be formed on the barrier film. Consequently, resistance of the metal film can be reduced.
According to a ninth aspect of the present invention, the layer is an Si1xe2x88x92xGex layer having a composition ratio of 0.2xe2x89xa6xxe2x89xa60.4.
According to a tenth aspect of the present invention, a method of manufacturing a semiconductor device comprises steps of (a) forming a gate insulator film on a main surface of a semiconductor substrate, (b) forming a semiconductor film on the gate insulator film which is doped with a prescribed impurity, (c) forming a barrier film on the semiconductor film, (d) forming a metal film on the barrier film, (e) introducing noble gas atoms into at least one of the semiconductor film in the vicinity of the interface between the same and the barrier film, the metal film in the vicinity of the interface between the same and the barrier film and the barrier film, and (f) selectively removing the metal film, the barrier film and the semiconductor film in this order thereby forming a gate electrode.
According to the tenth aspect, formation of a metal-semiconductor alloy can be suppressed in the semiconductor film also when metal atoms contained in the barrier film or the metal film diffuse into the semiconductor film, by introducing the noble gas atoms into the semiconductor film in the vicinity of the interface between the same and the barrier film.
Further, formation of a metal-semiconductor alloy can be suppressed in the metal film also when semiconductor atoms contained in the semiconductor film diffuse into the metal film, by introducing the noble gas atoms into the metal film in the vicinity of the interface between the same and the barrier film.
In addition, formation of a metal-semiconductor alloy can be suppressed in the barrier film also when the semiconductor atoms contained in the first semiconductor film diffuse into the barrier film, by introducing the noble gas atoms into the barrier film.
According to an eleventh aspect of the present invention, the noble gas atoms are introduced at least into the barrier film in the step (e), the noble gas atoms are introduced into the barrier film by ion implantation in the step (d), and the step (e) is carried out after the step (d).
According to the eleventh aspect, the barrier film approaches an amorphous state, whereby a metal film having a large crystal grain size can be formed on the barrier film. Consequently, resistance of the metal film can be reduced.
According to a twelfth aspect of the present invention, a semiconductor device comprises a substrate, a gate insulator film formed on a main surface of the substrate, and a gate electrode stacked with a first semiconductor layer doped with a prescribed impurity, a barrier layer and a metal layer in this order and formed on the gate insulator film, and a second semiconductor layer consisting of a material having a higher impurity activation rate than polysilicon is formed at least partially in the first semiconductor layer.
According to the twelfth aspect, resistance of the gate electrode can be reduced as compared with a semiconductor device comprising a gate electrode having a first semiconductor layer consisting of only polysilicon.
According to a thirteenth aspect of the present invention, the first semiconductor layer is entirely formed by the second semiconductor layer.
According to the thirteenth aspect, resistance of the gate electrode can be reduced as compared with a semiconductor device comprising a gate electrode having a second semiconductor layer partially formed in a first semiconductor layer.
According to a fourteenth aspect of the present invention, a third semiconductor layer different in impurity activation rate from the second semiconductor layer is further formed in the first semiconductor layer.
According to the fourteenth aspect, the threshold voltage of a transistor can be set by adjusting the ratio of the thickness of the second semiconductor layer to that of the third semiconductor layer.
According to a fifteenth aspect of the present invention, the second semiconductor layer is formed in at least either a part including the interface between the first semiconductor layer and the barrier layer or a part including the interface between the first semiconductor layer and the gate insulator film.
According to the fifteenth aspect, partial depletion of the layer doped with the impurity can be avoided in the second semiconductor layer in the vicinity of the interface between the first semiconductor layer and the barrier layer when the second semiconductor layer is formed in a part including the interface.
When the second semiconductor layer is formed in a part including the interface between the first semiconductor layer and the gate insulator film, partial depletion of the layer doped with the impurity can be avoided in the second semiconductor layer in the vicinity of the interface.
According to a sixteenth aspect of the present invention, the semiconductor device further comprises a noble gas atom introduction layer formed in at least one of the first semiconductor layer in the vicinity of the interface between the same and the barrier layer and the metal layer in the vicinity of the interface between the same and the barrier layer.
According to the sixteenth aspect, formation of a metal-semiconductor alloy can be suppressed in the first semiconductor layer also when metal atoms contained in the barrier layer or the metal layer diffuse into the first semiconductor layer, when the noble gas atom introduction layer is formed in the first semiconductor layer in the vicinity of the interface between the same and the barrier layer.
When the noble gas atom introduction layer is formed in the metal layer in the vicinity of the interface between the same and the barrier layer, formation of a metal-semiconductor alloy can be suppressed in the metal layer also when the semiconductor atoms contained in the first semiconductor layer diffuse into the metal layer.
According to a seventeenth aspect of the present invention, the second semiconductor layer is an Si1xe2x88x92xGex layer having a composition ratio of 0.2xe2x89xa6xxe2x89xa60.4.
According to an eighteenth aspect of the present invention, a semiconductor device comprises a substrate, a gate electrode stacked with a semiconductor layer doped with an impurity, a barrier layer and a metal layer in this order and selectively formed on a main surface of the substrate through a gate insulator film, and a noble gas atom introduction layer formed in at least one of the semiconductor layer in the vicinity of the interface between the same and the barrier layer and the metal layer in the vicinity of the interface between the same and the barrier layer.
According to the eighteenth aspect, formation of a metal-semiconductor alloy can be suppressed in the semiconductor layer also when metal atoms contained in the barrier layer or the metal layer diffuse into the semiconductor layer, when the noble gas atom introduction layer is formed in the semiconductor layer in the vicinity of the interface between the same and the barrier layer.
When the noble gas atom introduction layer is formed in the metal layer in the vicinity of the interface between the same and the barrier layer, formation of a metal-semiconductor alloy can be suppressed in the metal layer also when the semiconductor atoms contained in the semiconductor layer diffuse into the metal layer.
An object of the present invention is to obtain a method of manufacturing a semiconductor device and a structure of a semiconductor device capable of suppressing increase of gate resistance resulting from partial depletion of a layer doped with an impurity also when an impurity introduced into a semiconductor layer diffuses into a barrier layer or a gate insulator film in relation to a semiconductor device comprising a polymetal gate having a multilayer structure obtained by stacking a semiconductor layer, a barrier layer and a metal layer in this order.
Another object of the present invention is to obtain a method of manufacturing a semiconductor device and a structure of a semiconductor device capable of avoiding formation of metal silicide and suppressing increase of gate resistance also when silicon atoms contained in a semiconductor layer diffuse into a barrier layer or a metal layer or metal atoms contained in the barrier layer or the metal layer diffuse into the semiconductor layer.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.